Engine control

ABSTRACT

An engine control wherein a shaft driven by the engine causes a first signal to be generated and then a second signal after the shaft has rotated through a predetermined degree. The first signal starts a timer into operation, the timer producing a timer pulse of predetermined duration. Time coincidence of the timer signal and second signal indicates that a critical engine speed has been reached and such time coincidence is used to effect a control function. If the shaft rotates in the opposite direction the sequence of generation of the first and second signals in such direction is detected and used to generate a reverse-direction signal which is used to effect a control function. An automatic impedance-changing circuit enables the control to be used with a wide range of batteries.

BACKGROUND OF THE INVENTION

This invention relates to engine controls and more particularly tosensor apparatus for sensing the speed and direction of engine rotationand to control circuits associated with the sensor apparatus forcontrolling the operation of the engine in the event of reverse rotationof the engine or when preselected engine speeds are attained.

It is desirable to provide automatic controls for engines which operatewhen a particular engine speed has been reached. For example, governorsare widely used to limit the maximum speed of an engine or to shut downthe engine in case the maximum speed is exceeded. Another exampleinvolves the starting motor which cranks the engine at low speed onstartup. When the engine catches and picks up speed the starting motorshould be disengaged or deactivated to prevent damage thereto.Oftentimes it is desirable to provide warning devices which signal anengine malfunction, such as low oil pressure, which malfunction may bedifferent in magnitude depending on whether the engine is operatingabove or below a selected speed.

At times, a slight rocking of the engine shaft can occur with normalstops and starts, so that the engine rotates in a reverse direction. Itis highly desirable that reverse rotation be detected and that theengine be shut down in the event of such rotation for otherwise severedamage to the engine could result if ignition occurred with the engineturning in the reverse direction.

Various mechanical devices have been provided in the past which aredirectly connected to a rotating portion of the engine for movementthereby, these devices providing a means whereby the engine speed anddirection of rotation may be monitored. Such devices, however, aresubject to wear and fouling by dirt and grime. In addition, complicatedlinkages are necessary to provide for adjustments in the event that thecritical speed at which a control function is to occur is changed.

SUMMARY OF THE INVENTION

The present invention is directed to overcoming one or more of theproblems set forth above.

According to the present invention, a magnet is mounted on an engineshaft and offset from the axis thereof so that the magnet orbits aroundthe shaft at a speed proportional to the speed of the engine. At leastone electronic switch is provided, the switch being fixed relative tothe shaft and disposed adjacent the orbital path of the magnet and beingactuable by the magnet when the magnet is proximate thereto.

Also according to the invention, a control circuit is provided whichstarts an electronic timer in response to a first signal from theactuation of the switch by passage of the magnet thereby, the timerhaving an output pulse of a preselected length. A second signal isgenerated when the magnet has been moved by the engine shaft through afixed distance. If the engine speed is below the critical speed, thetime required for the magnet to be moved through the fixed distance willbe greater than the length of the timer pulse and the second signal willnot be generated until after the timer pulse has ended. Conversely, ifthe engine speed is above the critical speed, the magnet will be movedmore rapidly so that the second signal is generated before the timerpulse ends. A control signal is developed depending upon whether thesecond signal is generated before or after the end of the timer pulse,the control signal being then used to effect a desired control of anengine function.

Further according to the invention, the pulse length of the timer iseasily adjustable so that the critical speed can be readily set to adesired value.

Also according to the invention, the control circuit may be used to shutdown the engine in the event an overspeed situation occurs, and theoperation of the circuit may be tested so that an overspeed situation issimulated when the engine reaches a predetermined proportion of theactual overspeed limit, the predetermined proportion being the sameregardless of the particular overspeed limit selected for operation.

Still further according to the invention the direction of enginerotation is detected by use of a second magnetically actuated switchfixed adjacent the first switch, a logic circuit being provided toproduce a control signal if the magnet passes by the two switches in onedirection but not in the opposite direction.

Also according to the invention, an automatic impedance-changing circuitis provided to limit the input voltage to the control circuit to a safevalue so that the control circuit may be used with any battery having anoutput voltage within a wide voltage range.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings, forming a part of the application and in which likeparts are designated by like reference numerals throughout the same,

FIG. 1 is a combined block schematic diagram of an engine systemutilizing the speed sensor and control unit of the present invention;

FIG. 2 is a sectional view of the tachometer drive and sensor assemblyof FIG. 1;

FIG. 3 is a sectional view of the tachometer drive and sensor assembly,taken on line 3--3 of FIG. 2;

FIGS. 4A and 4B are circuit diagrams of the control unit of FIG. 1.

DESCRIPTION OF A PREFERRED EMBODIMENT

Referring now to the drawings, FIG. 1 illustrates a simplified butfunctional engine control system for engine 10 having a throttle lever11 which reciprocates the fuel rack linkage 12 to control the amount offuel flowing from fuel tank 13 through governor 14 to engine 10. Theengine is provided with a conventional start motor 16 geared thereto. Instarting, main switch 17 is closed to connect battery 18 to theoperating circuits for the engine. Start switch 19 is closed to energizestart solenoid 21 through the normally closed contact 22 and switchblade 23 of the crank termination switch 24. Energization of startsolenoid 21 will cause its contacts 26 to close, supplying power fromthe battery to start motor 16 so that the engine is cranked. Shaft 27,directly driven by the engine, is coupled to the tachometer drive andsensor assembly 28 to drive the sensors therein at a speed proportionalto the speed of the engine. Engine speed is displayed by a conventionaltachometer 29. In addition, sensor information is transmitted by lines31 and 32 to the control unit 33 to be used therein to determine thespeed and direction of rotation of the engine. If the engine does startinto operation on cranking thereof, control unit 33 causes the switchblade 23 of the crank termination switch 24 to move from the normallyclosed contact 22 to the normally open contact 34, to de-energize thestart solenoid 21 and turn on the "RUN" light 39.

The control unit 33 is also used to provide a low-oil-pressure warningby the actuation of the oil step switch 41. At engine speeds below lowidle, switch blade 42 will be closed against normally closed contact 43.If the oil pressure is below the normal level for operation at suchspeeds, e.g., 20 psi, switch 44 will be closed so that the pre-trip oilpressure warning light 46 will be energized from the battery 18. If theengine speed is above low idle, control unit 33 causes switch blade 42to close against normally open contact 47. The existence of normal oilpressure will maintain oil-pressure switch 48 open. If the oil pressuredrops below normal, e.g. below 40 psi, switch 48 closes and turns on thetrip/run oil-pressure warning light 49.

The engine 10 may be shut down in any conventional manner. For example,closing the manually operable normal-shutdown switch 51 will complete anenergizing circuit from the battery 18 to the shutdown solenoid 52 andcause the fuel-rack linkage 12 to move to a fuel-off position. Inaddition, control unit 33 provides for automatic shutdown in the eventthat the engine is rotating in the reverse direction or if the enginespeed exceeds a predetermined maximum speed. If the engine is rotatingin the wrong direction, switch blade 53 will be closed against normallyopen contact 54 of the reverse rotation switch 56 to ground and energizethe shutdown solenoid. Similarly, the shutdown solenoid will beenergized through normally open contact 57 and switch blade 58 ofoverspeed switch 59 if the engine speed is excessive.

The tachometer drive and sensor assembly 28 is illustrated in FIGS. 2and 3, and comprises a housing 61 secured to frame 62 of engine 10 bycollar 63. Shaft 64 is journaled in housing 61 and is coupled to shaft27 of the engine for unitary rotation therewith. Shaft 27 is preferablythe drive shaft of the fuel pump for the engine which rotates atone-half engine speed. However, shaft 27 may be any operating member ofthe engine, it being important only that shaft 64 by driven by theengine at a speed proportional to the speed of the engine. Housing 61 isprovided with external threads 66 and the end of shaft 64 is slotted at67 for the usual connection of a drive cable for the engine tachometer29.

A radially extending disc 68 is fixed to shaft 64 for rotation therewithand has three bar magnets 70, 71 and 72 potted or pressed within boresin the disc, the magnets being the same distance outwardly from the axisof shaft 64. Two closely spaced Hall effect switches 73 and 74 are fixedto housing 61, with their sensors 76 positioned closely to disc 68 to beaffected by the magnets as they are rotated therepast. A counterweight77 is mounted in disc 68 opposite the magnets for balancing purposes.

Hall effect switches 73 and 74 are schematically illustrated in FIG. 4A.When not actuated, the output terminals 78 of the switches are at a highvoltage level, namely that of the power supplied to the switch. When thesensor 76 of a switch is influenced by a magnetic south pole, the sensoroutput is amplified by amplifier 79 and turns on transistor 81 to"close" the switch and ground the output terminal 78.

Returning to FIG. 3, three bar magnets 70, 71 and 72 are used, tosharply define the magnetic field and enhance reliability of the switchpoints of the Hall switches by causing the Hall sensors to be influencedby a north pole preceding and following a south pole. When disc 68 isdriven in the direction of the arrow by forward rotation of the engine,the north pole of magnet 70 will move past the Hall sensors and thesouth pole of magnet 71 will then move past the sensors to cause theiroutputs to go low during the passage of magnet 71 therepast.

The sensors of the Hall switches 73 and 74 are spaced closely togetherand the magnet 71 is dimensioned relative thereto to provide amake-before-break operation. I.e., as magnet 71 is moved by the sensorsin the direction as shown, Hall switch 73 will first close. Hall switch74 will then close, followed by an opening of Hall switch 73 as it isinfluenced by the north pole of magnet 72. Hall switch 74 willthereafter open in similar fashion. Both switches will remain open, witha high output, until the next time that magnet 71 moves therepast. TheHall switches will be similarly operated in a make-before-break mannerif the magnet 71 is moved therepast in the opposite direction, with Hallswitch 74 being closed before Hall switch 73.

The operating circuits of control unit 33 are shown in detail in FIGS.4A and 4B.

The power input from battery 18 is applied through diode 86 to anautomatic impedance-changing arrangement which limits the input voltageto the voltage regulator 87 to a safe value so that the control unit maybe used with a wide range of batteries.

For example, in the particular embodiment disclosed, a 6-volt voltageregulator is used, the control circuits draw a maximum of 150 milliamps,it is desired to limit power dissipation by the regulator toapproximately 2 watts, and it is desired to provide for operation with abattery having an output anywhere in the range of from 8 to 40 volts.

Zener diodes 88 and 89 are provided, these diodes having breakdownpotentials of 20 and 30 volts respectively. If the battery voltage isbelow 20 volts, diode 88 will not conduct and transistor 91 will be off,allowing transistor 92 to turn on and provide a direct path for currentflow from the battery to voltage regulator 87. In such case, the maximumvoltage across regulator 87 will be the difference between its maximum20-volt input and its 6-volt regulated output voltage, or 14 volts. Withmaximum current of 150 milliamps, the maximum power dissipation in theregulator will be 2.1 watts.

If the battery voltage is above 20 volts, zener diode 88 will conductthrough resistors 93 and 94, and the drop across resistor 92 will turntransistor 91 on, thereby reverse biasing diode 95 in the base circuitof transistor 92 and turning the latter off. If the battery potential isless than 30 volts, zener diode 89 will not conduct, and transistor 96will be off, allowing transistor 97 to conduct. Such conduction willplace resistors 98 and 99 in parallel between the battery and voltageregulator 87. If resistors 98 and 99 have values of 180 and 150 ohms,respectively, the parallel value of these resistors will beapproximately 82 ohms. At maximum current, the maximum voltage acrossthe voltage regulator would be [30-(82×0.150)-6], or 11.7 volts, and themaximum power dissipation in the regulator would be 1.755 watts.

(At operation below 20 volts, transistor 97 will be conductive, but noappreciable current will flow through resistors 98 or 99 since they areshunted by transistor 92.)

With a supply voltage greater than 30 volts, zener diode 89 will conductthrough resistors 101 and 102, causing transistor 96 to conduct, reversebiasing diode 100 which turns off transistor 97, leaving only resistor99 in the circuit for full current flow therethrough to the voltageregulator. Maximum power dissipation in the voltage regulator 87, at a40-volt supply and a 150-milliamp maximum current would be 1.725 watts.

The 6-volt regulated output from voltage regulator 87 is applied to thepositive bus 103, and is also used, by line 104, to power the Hallswitches.

The reverse rotation circuit will now be described. A flip-flop 106 isprovided, comprising NAND gates 107 and 108 interconnected as shown.With this arrangement a low reset signal to the R input of gate 108 ofthe flip-flop will cause the Q and Q outputs to go low and high,respectively. If a low set signal is then applied to the S input of gate107 when the R input is high, the Q and Q outputs will go high and lowrespectively and will stay that way, even though the set signal thengoes high, until a low reset signal is subsequently applied to the Rinput.

The S input of flip-flop 106 is connected through resistor 109 to thepositive bus 103 and is also connected to the output terminal 78 of Hallswitch 73 by line 31. Thus, the S input will be maintained high exceptwhen a low set signal is applied thereto when Hall switch 73 is closed.

The reset input R of flip-flop 106 is similarly connected throughresistor 111 to the positive bus 103 and to the output terminal 78 ofHall switch 74. The reset input will thus be held high except when Hallswitch 74 closes to ground the reset input. Capacitors 112a and 112bconnect the inputs of flip-flop 106 to ground so that transients willnot cause false triggering of the flip-flop when the power is firstturned on.

The two inputs of NAND gate 113 are connected to the two Hall switchoutputs. If both Hall switches are open, both inputs are high and gate113 will output a low, which is inverted to a high by inverter 114 andapplied to NAND gates 116 and 117. If either, or both, Hall switches areclosed, NAND gate 113 will output a high so that inverter 114 will applya low, inhibiting voltage to gates 116 and 117.

The Q output of flip-flop 106 is also applied to gate 116, whose outputis applied to the trigger input T of counter 118. The Q output offlip-flop 106 is applied to gate 117 whose output is inverted byinverter 119 and applied to the reset input R of counter 118. Counter118 is reset by a high signal to R and triggered by a low signal to T.The second output 2 of counter 118 is normally low but will go high whenthe counter has been twice triggered. This output, inverted by inverter120 is applied to the set input S of flip-flop 121. The reset input R offlip-flop 121 is connected by resistor 122 to the output of gate 117 andis connected to ground by capacitor 123.

If the Q output of flip-flop 121 is low, transistor 124 is turned off.With a high Q output, current flow through resistors 126 and 127 willturn transistor 124 on and energize relay coil 128 therethrough andcause the reverse rotation switch 56 to be actuated.

In flip-flop configurations employing NAND circuits as is the case forflip-flop 106, the reset function has priority. Therefore when power isinitially applied, capacitor 112b will cause flip-flop 106 to reset witha low Q output and a high Q output. When capacitor 112b charges, it willhold the R input of flip-flop 106 high until such time as Hall switch 74closes. The high Q output and high output from inverter 114 causes gate117 to output a low to reset counter 118. During initial power,capacitor 123 appliee a low reset signal to flip-flop 121, and the lowfrom gate 117 holds the low reset to flip-flop 121 to maintain a low Qoutput from flip-flop 121 and a turn-off signal to transistor 124.

The state of the various components of the reverse-rotation circuitduring normal forward rotation is set forth in the following tablewherein high and low voltage levels are indicated by 1's and 0's,respectively. Step 1 sets forth the condition during the time beforemagnet 71 comes to the Hall sensors. Steps 2-4 set forth what happens asthe Hall sensors are influenced by magnet 71 and Hall switches 73 and 74are operated in that order and in a make-before-break manner. Step 5represents the time period after the magnet leaves the Hall sensors andbefore it comes to them again. Steps 6-8 are for the next pass-by of thesensors by the magnet, and step 9 is again when the magnet has left thesensors and they restore to normal. Each succeeding full revolution ofdisc 68 will repeat steps 6-9.

    __________________________________________________________________________    FORWARD ROTATION                                                              F/F 106               Counter 118 F/F 121                                        S  R               R  T                                                       (Hall                                                                            (Hall  113                                                                              114                                                                              117                                                                              (119                                                                             (116                                                 Step                                                                             73)                                                                              74)                                                                              Q --Q                                                                             out                                                                              out                                                                              out                                                                              out)                                                                             out)                                                                             2 S R Q 124                                       __________________________________________________________________________    1  1  1  0 1 0  1  0  1  1  0 1 0 0 off                                       2  0  1  1 0 1  0  1  0  1  0 1 1 0 off                                       3  0  0  1 0 1  0  1  0  1  0 1 1 0 off                                       4  1  0  0 1 1  0  1  0  1  0 1 1 0 off                                       5  1  1  0 1 0  1  0  1  1  0 1 0 0 off                                       6  0  1  1 0 1  0  1  0  1  0 1 1 0 off                                       7  0  0  1 0 1  0  1  0  1  0 1 1 0 off                                       8  1  0  0 1 1  0  1  0  1  0 1 1 0 off                                       9  1  1  0 1 0  1  0  1  1  0 1 0 0 off                                       __________________________________________________________________________

As will be seen, each time that Hall switch 73 closes (step 2),flip-flop 106 will be set so that its Q output goes high. Hall switch 74closes shortly thereafter (step 3) and as soon as Hall switch 73 opens,flip-flop 106 will reset. The high Q output from the setting offlip-flop 106 cannot trigger counter 118 since it occurs only during thetime period when the magnet is passing the Hall sensors, and gate 116 isinhibited by gate 113 during such period. As a consequence, counter 118is never triggered during forward rotation and flip-flop 121 willmaintain transistor 124 off.

The sequence of operations in the event of a reverse rotation of theengine is set forth in the next table. Step 1 is the situation beforemagnet 71 comes to the Hall sensors. Steps 2-4 represent the conditionsas the magnet passes by the sensors, with Hall switch 74 now beingclosed before Hall switch 73. Step 5 is the next period as the magnettravels with disc 68 around to the sensors again. Steps 6-8 are the nextactuation of the Hall switch, and step 9 is when the Hall sensors arepassed. Steps 10-13 represent another full revolution of disc 68. Steps14-16 illustrate the resetting which occurs as the engine is crankedforwardly in a re-start operation.

    __________________________________________________________________________    REVERSE ROTATION AND RESET                                                    F/F 106               Counter 118 F/F 121                                        S  R               R  T                                                       Hall                                                                             Hall   113                                                                              114                                                                              117                                                                              119                                                                              116                                                  Step                                                                             73 74 Q --Q                                                                             out                                                                              out                                                                              out                                                                              out                                                                              out                                                                              2 S R Q 124                                       __________________________________________________________________________    1  1  1  0 1 0  1  0  1  1  0 1 0 0 off                                       2  1  0  0 1 1  0  1  0  1  0 1 1 0 off                                       3  0  0  0 1 1  0  1  0  1  0 1 1 0 off                                       4  0  1  1 0 1  0  1  0  1  0 1 1 0 off                                       5  1  1  1 0 0  1  1  0  0  0 1 1 0 off                                       6  1  0  0 1 1  0  1  0  1  0 1 1 0 off                                       7  0  0  0 1 1  0  1  0  1  0 1 1 0 off                                       8  0  1  1 0 1  0  1  0  1  0 1 1 0 off                                       9  1  1  1 0 0  1  1  0  0  1 0 1 1 on                                        10 1  0  0 1 1  0  1  0  1  1 0 1 1 on                                        11 0  0  0 1 1  0  1  0  1  1 0 1 1 on                                        12 0  1  1 0 1  0  1  0  1  1 0 1 1 on                                        13 1  1  1 0 0  1  1  0  0  1 0 1 1 on                                        14 0  1  1 0 1  0  1  0  1  0 1 1 1 on                                        15 0  0  1 0 1  0  1  0  1  0 1 1 1 on                                        16 1  0  0 1 1  0  1  0  1  0 1 1 1 on                                        17 1  1  0 1 0  1  0  1  1  0 1 0 0 off                                       __________________________________________________________________________

In the first pass-by of the Hall sensors by magnet 71 (steps 2-4) Hallswitch 74 closes before Hall switch 73. As a result of this, flip-flop106 will now be set in step 4, and its Q output will remain high duringthe time that magnet 71 is carried around and back to switch 74 (step5). During step 5, the high outputs of both Hall switches cause gate 113to output a low which is inverted and applied to gate 116, so that witha high Q output, gate 116 can deliver a low trigger to counter 118. Whenthe magnet again comes to the Hall sensors (steps 6-8) flip-flop 106 isreset (step 6) and then set again (step 8) so that in step 9 another lowtrigger pulse is applied to counter 118. With two counts therein,counter output 2 goes high so that inverter 120 applies a low set signalto the S input of flip-flop 121. The Q output goes high to turn ontransistor 124 so that relay 128 actuates the reverse rotation switch 56to ground the shutdown solenoid (FIG. 1) and shut off fuel to theengine.

Since the Q output of flip-flop 106 is low in reverse rotation duringthe period between actuation of the switches, gate 117 will output ahigh at all times, and flip-flop 121 will not be reset. Thus, onceflip-flop 121 is set, transistor 124 will remain on even though the setsignal from counter 118 may disappear.

With the fuel cut-off in response to actuation of switch 56, the enginewill stop, and the state of the components will be as shown in step 13.

The start motor may now be energized to crank the engine forwardly as ina normal start operation. As disc 68 moves the magnet 71 past the Hallsensors (steps 14-16), flip-flop 106 will be reset in step 16 so thatits Q output will go high. As soon as the magnet leaves the sensors(step 17) gate 113 will output a low to remove the inhibit voltage fromgate 117. Its output will go low so that a reset signal is deliveredthrough inverter 119 to counter 118 and through resistor 122 toflip-flop 121. With the latter reset, transistor 124 is turned off sothat the reverse-rotation switch 56 restores to its normal illustratedposition. Fuel can now flow to the engine and the engine will start onfurther cranking.

The above circuit, by use of counter 118, allows a single reverse passof the Hall sensors by magnet 71 to occur, as can happen through slightrocking of the engine shaft on normal stops and starts, withoutshutdown, while ensuring shutdown if two consecutive reverse passes ofthe sensors occur.

The output of gate 117 is sent by lead 131 to the overspeed, cranktermination and oil step circuits of FIG. 4B. As brought out above, theoutput of gate 117 will go low only during forward rotation of theengine, each time that magnet 71 leaves the second Hall switch 74, andwill remain low until the magnet is carried back to the first Hallswitch 73.

In FIG. 4B, the output of gate 117 on lead 131 is applied throughcapacitor 132 to terminal 2 of timer 133, this terminal also beingconnected, by resistor 134, to the positive bus 104. Timer 133 has anormally low output at its terminal 3 and operates such that when thevoltage at terminal 2 falls below one-third of the voltage on bus 104the timer is triggered and produces a single pulse (terminal 3 goeshigh) whose duration is determined by the values of resistors 136 and137 and capacitor 138. Resistor 136 is adjustable so that the length ofthe pulse may be set as desired. If desired, a commercially availableSignetics SE 555 CV Monolithic linear integrated timer circuit may beused, such timer having terminals as shown in FIG. 4B.

When the engine rotates in the forward direction, timer 133 will betriggered each time magnet 71 leaves the second Hall switch 74 toproduce a single pulse which is applied to one of the inputs of NANDgate 139. The output of the first Hall switch 73 is inverted by inverter141, so that whenever Hall switch 73 is actuated by magnet 71, a highwill be applied to gate 139.

During engine operation at any forward speed below the predeterminedoverspeed limit, timer 133 will generate a high pulse at its output pin3 as soon as magnet 71 leaves Hall switch 74. This pulse will time outduring the time that the rotation of shaft 64 is carrying the magnetback to Hall switch 73, so that the timer output will go low againbefore magnet 71 reaches Hall switch 73. During this pulse period, Hallswitch 73 is outputting a high so that inverter 141 applies a low togate 139. When the magnet again reaches Hall switch 73, it will output alow and inverter 141 will output a high to gate 139, but timer 133 willbe outputting a low to gate 139 at such time. As a consequence, gate 139will have at least one low input at all times so that its output iscontinuously high and flip-flop 142 is never set.

As the engine speed increases, the time required for shaft 64 to rotatemagnet 71 from Hall switch 74 back to Hall switch 73 will decrease. Ifthe engine speed increases to above the overspeed limit, the speed ofshaft 64 will increase to such an extent that the timer for the magnetto travel from Hall switch 74 to Hall switch 73 is less than the fixedlength pulse time of timer 133. As a consequence, inverter 141 willoutput a high to gate 139 while timer 133 is still outputting a highthereto. This time coincidence of high inputs to gate 139 causes itsoutput to go low and set flip-flop 142. Its Q output goes high and thevoltage divider, made up of resistors 143 and 144, will turn transistor146 on to ground relay coil 147 so that the energization thereof frompositive bus 104 will cause the switch blade 58 of the overspeed switch59 to close against the normally open contact 57 to ground the shutdownsolenoid 52 and shut off fuel to the engine. With transistor 146 on,light-emitting diode 148 will be energized through resistor 149 andtransistor 146 to provide a visual signal of the overspeed condition.

Once set, flip-flop 142 will continue to have a high Q output until suchtime as a low reset signal is applied. In the present embodiment,flip-flop 142 is reset by a closure of manually operable switch 152which grounds the reset input R of flip-flop 142 and resets theflip-flop so that its Q output goes low and turns transistor 146 off.Opening of reset switch 152 allows capacitor 153 to charge throughresistor 154 and thereafter maintain a high on the reset input.

Preferably resistor 136 is adjusted so that the overspeed trip point issomewhat above the nominal maximum speed of the engine to allow fornormal, short-term increases in engine speed without causing unwantedshutdowns.

It is desirable that the operator be able to test the functioning of theoverspeed circuit to see if all is in order while the engine isoperating at a normal speed, i.e., near rated speed but below theoverspeed limit set by the adjustment of resistor 136. Testing isaccomplished by means of the manually operable test switch 156 which,when closed, will connect capacitor 157 in parallel with capacitor 138.This will increase the amount of capacitance in series with resistors136 and 137 and will lengthen the time required for the voltage at pins6 and 7 of timer 133 to rise to a level which will cause the timer pulseto terminate. The longer timer pulse thus establishes a lower test speedlimit. Thus, if the engine is rotating at a normal speed, and such speedis above the test speed, the overspeed circuit will function to causethe overspeed relay 59 to operate.

The length of the timer pulse is a direct function of the RC values ofresistors 136 and 137 and capacitors 138 and 157. The overspeed limitvaries inversely with these values. Thus, the normal overspeed limitwill be a function of 1/(resistor 136+resistor 137)(capacitor 138), andthe test speed limit will be a function of 1/(resistor 136+resistor137)(capacitor 138+capacitor 157). If it is desired to have the testspeed be 75% of the normal overspeed limit, then1/(R136+R137)(C138+C157)=(0.75/R136+R137)(C138). From this, it will befound that capacitor 157 should be equal to one-third the value ofcapacitor 138 in order to have the test speed limit be 75% of the normaloverspeed limit. Moreover, it will be found from this equation that ifthe resistance is maintained the same for both the normal overspeedlimit and during testing, and if capacitors 138 and 157 have fixedvalues, the ratio of test speed to overspeed will be the same regardlessof the value to which resistor 136 has been adjusted.

Thus, by means of the present test circuit, wherein fixed capacitor 157may be placed in parallel with fixed capacitor 138, the normal overspeedlimit can be adjusted to any speed permitted by the range of adjustmentof resistor 136, and the test speed limit will be a constant percentageof whatever the selected overspeed limit may be, e.g., 75% of theoverspeed limit in the above example.

The Crank Termination circuit operates very much in the same way as theoverspeed circuit. The same signal that causes the overspeed timer 133to pulse is also applied to pin 2 to the crank termination timer 161,and the output pulse therefrom is applied to NAND gate 162. Similarly,the output from inverter 141 is applied to gate 162. Thus, if Hallswitch 73 is actuated before the end of the pulse from timer 161, theoutput of gate 162 will go low to set flip-flop 163 and turn ontransistor 164 so that relay coil 166 is energized, thereby causing thecrank termination switch 24 to operate.

The length of the pulse from timer 161 is set, by adjusting resistor167, somewhat above normal crank speed and below low idle speed of theengine, so that when the engine catches it will actuate the cranktermination circuit.

During cranking, each time the output of timer 161 goes high, the timerpulse is transmitted through diode 168 and resistor 169 to the resetinput of flip-flop 163 and to the resistor 171 and capacitor 172network. These pulses serve to establish a charge on capacitor 172 andthus prevent resetting of the flip-flop.

Once set, flip-flop 163 will remain latched by the charge on capacitor172 until engine rotation is stopped, either by normal shutdown or bycoasting down from the crank termination speed if the engine does notstart. When the output pulses from timer 161 stop, capacitor 172 candischarge through resistor 171 and a low signal will then be applied tothe reset input R of flip-flop 163 to provide an automatic reset. Theoutput of the flip-flop goes low to turn off transistor 164 andde-energize the crank termination relay coil 166.

Preferably, the time delay for resetting, established by the RC networkof resistor 171 and capacitor 172, is greater then the time required forthe engine to decelerate to a stop.

The Oil Step circuit is designed to provide two different warnings tothe engine operator. A first warning is given when the engine speed isbelow a selected speed that is less than normal operating speed and theoil pressure is below a relatively low predetermined value. Preferablythe selected speed approximates the low idle speed for the engine justafter it starts. For example, such speed may be 1200 rpm and it may bedesired to give a warning if the oil pressure is less than 20 psi whenthe engine speed is below 1200 rpm. A second warning is given if theengine speed is above the selected speed and the oil pressure is lessthan normal, e.g., if the engine speed is above 1200 rpm and the oilpressure is less than 40 psi. To prevent a false signal, a time delay isincorporated so that when the engine initially starts up and increasesin speed above the 1200 rpm point sufficient time is given so that theoil pressure can build up to the normal value.

The Oil Step circuit operates in the following manner. As before, eachtime that the magnet 71 leaves the second Hall switch 74 and the engineis rotating forwardly, a signal is applied to pin 2 of timer 176 togenerate a pulse of a duration determined by resistors 177 and 178 andcapacitor 179. Resistor 177 is adjusted so that the duration of thetimer pulse is equal to the time that it takes for magnet 71 to travelback to Hall switch 73 when the engine is operating at 1200 rpm, Thetimer output pin 3 is applied to NAND gate 180, together with the signalfrom Hall switch 73, inverted by inverter 141.

At engine speeds below 1200 rpm, the output of gate 180 will be high atall times so that flip-flop 181 is not set and has a low Q output. Thisis inverted by inverter 182 so that a high is outputted through diode183 and resistor 184 to inverter 185. The low output therefrom isapplied to the base of transistor 186 to maintain this transistor off.The oil step switch thus grounds its terminal 43 at such time. If theoil pressure is below 20 psi, the conventional pressure-actuated switch44 (FIG. 1) is open. However, if the oil pressure is below 20 psi,switch 44 will close, completing an energizing circuit to light 46 whichwill illuminate to provide a warning to the operator of the low oilpressure condition.

An increase in engine speed to 1200 rpm causes the high signal frominverter 141 to be applied to the input of gate 180 during the period ofthe output pulse from timer 176, and the output of gate 180 will go lowto provide a set signal to flip-flop 181. The Q output thereof goes highand is inverted by inverter 182.

It is desirable to provide a time delay between the time that the enginespeed reaches 1200 rpm and the time that the oil-step switch 41 isactuated. This time delay is provided herein as follows.

During the time that the speed is below 1200 rpm the high output ofinverter 182 will cause capacitor 187 to charge. When the flip-flop 181is set at 1200 rpm and the output of inverter 182 goes low, capacitor187 will discharge. Diode 183 prevents discharge into inverter 182 andthus the discharge path for capacitor 187 is through resistor 188. Thisprovides a time delay before the voltage at the input of inverter 185drops to the transfer level and the output thereof goes high. Thisdelayed high output will turn on transistor 186 to energize the oil steprelay coil 189. Typically, a delay of about 8 seconds is desirable andthe values of capacitor 187 and resistor 188 are selected to providesuch delay.

With relay coil 189 energized, the oil step switch is actuated to groundthe normally open contact 47 thereof and complete an energizing circuitthrough the oil-pressure-actuated switch 48 to light 49. If the oilpressure is above 40 psi, switch 48 is held open. If the pressure fallsbelow that value, switch 48 will close and light 49 will be illuminatedto warn the operator of the low oil-pressure condition.

Flip-flop 181 remains set and transistor 186 remains conductive as longas the engine speed remains above 1200 rpm. On the first time that therewas a time coincidence of high signals at the input to gate 180, suchthat its output went low to set the flip-flop 180, the low output ofgate 180 was inverted by inverter 191, causing capacitor 192 to chargequickly and apply a high voltage at the reset input R of flip-flop 181.When the time coincidence of high signals to gate 180 ends, its outputgoes high and the output of inverter 191 goes low. Capacitor 192 cannotdischarge into inverter 191 because of diode 193 and must discharge at arelatively slow rate through resistor 194. The next time coincidence ofhigh signals to gate 180 will again cause the output of inverter 191 togo high and recharge capacitor 192. The values of capacitor 194 andresistor 194 are chosen so that capacitor 194 cannot discharge in onecycle of operation to a level sufficient to reset flip-flop 181.

Flip-flop 181 will reset automatically when the engine speed drops below1200 rpm. At such speed, the output of gate 180 remains high and theoutput of inverter 191 remains low, allowing capacitor 192 to dischargesufficiently to drop the voltage at the reset input of flip-flop 181below the transfer level, thus permitting the flip-flop to reset.

With flip-flop 181 reset, transistor 186 turns off to de-energize relaycoil 189 so that the oil step switch 41 reverts to its deactuatedposition.

Although the function of the shutdown circuits (FIGS. 4A and 4B) andsensors (FIGS. 2 and 3) have been described in conjunction with aspecific system (FIG. 1) it will be understood that the same relayfunctions with the same or other trip modes could be used in variousmodifications of the system of FIG. 1. For example, instead of cuttingoff the fuel supply, engine shutdown could also be realized by shuttingoff the air inlet to the engine, or by turning off the ignition systemin an engine utilizing spark plugs. The disclosed relays could, ifdesired, be used to shut down the engine by any one, or a combination,of these methods. If desired, engine shutdown could also be accomplishedby use of the oil step relay, if desired. The crank termination relaycould be used in conjunction with appropriate circuitry to perform someother function if termination of the start motor operation in manualstart operations were to be considered an unnecessary luxury.

The particular arrangement of the speed sensor makes it convenientlysuitable for use with logic circuitry of the type shown in FIGS. 4A and4B to effect control functions related to engine operation at anyselected speed point within the range of any type of internal combustionengine. For example, it is well known that for engines equipped with aturbocharger, an increase in the volume of air provided to theturbocharger at low speeds will provide a jet assist to the turbochargerso that turbocharger lag is prevented, thereby allowing faster engineacceleration. The increased air volume fed into the engine from theturbocharger also enhances clean burning and reduces polluting emissionsas the engine accelerates. U.S. Pat. No. 3,396,534 discloses a systemwherein the volume of air is increased to act as a jet assist in theturbocharger compressor over a preselected turbocharger speed rangewherein it is desirable to increase the rate of acceleration of theengine, with the increased air being cut off at the top of the speedrange by a control valve responsive to the degree of manifold pressure.Since the present invention provides a system whereby the engine speedcan be sensed and control functions effected at preselected speeds, itcan easily be used in such a turbocharge system to provide increased airbelow a selected engine speed.

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
 1. Apparatus for controlling the functioning of an engine comprising:.Iadd.A. .Iaddend.a shaft driven by said engine at a speed proportional to the engine speed, .Iadd.B. .Iaddend.means responsive to rotation of said shaft through a predetermined degree of rotational movement for generating a first signal at the beginning of such movement and a second signal at the end of such movement, p1 .Iadd.C. .Iaddend.timer means for producing a timer signal of predetermined time duration, .Iadd.D. .Iaddend.means for starting said timer in response to generation of said first signal, .Iadd.E. .Iaddend.means for effecting a control function in response to time coincidence of said second signal and said timer signal.Iadd., said effecting means including,i. a normally reset flip-flop apparatus, ii. means for setting said flip-flop apparatus in response to said second signal being generated during the existence of said timer signal, and iii. means for effecting said control function in response to setting of said flip-flop apparatus.Iaddend.. .[.2. Control apparatus as set forth in claim 1 wherein said means for effecting a control function in response to time coincidence of said second signal and said timer signal comprises: a normally reset flip-flop means, means for setting said flip-flop means if said second signal is generated during the existence of said timer signal, means responsive to the setting of said flip-flop means for effecting said control function..].
 3. Apparatus as set forth in claim .[.2.]. .Iadd.1 .Iaddend.wherein said timer means includes a capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said capacitor for charging said capacitor through said variable resistor.
 4. Apparatus as set forth in claim .[.2.]. .Iadd.1 .Iaddend.wherein said timer means includes a first capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said first capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said first capacitor for charging said first capacitor through said variable resistor, said apparatus further including:a second capacitor, means including a manually operable switch for connecting said first and second capacitors in parallel when said switch is operated.
 5. Apparatus as set forth in claim .[.2.]. .Iadd.1 .Iaddend.and further including:a manually operable switch, means responsive to operation of said switch for resetting said flip-flop means.
 6. Apparatus as set forth in claim .[.2.]. .Iadd.1 .Iaddend.and further including:means including a capacitor for resetting said flip-flop means when the charge on said capacitor drops below a predetermined value, said means further including means for rapidly charging said capacitor to above said value during the existence of said timer signal and means for slowly discharging said capacitor when said timer signal is not present.
 7. Apparatus as set forth in claim .[.2.]. .Iadd.1 .Iaddend.wherein said flip-flop means is resettable by application of a low signal thereto and wherein said flip-flop means cannot be set while a low reset signal is applied thereto, and further including:means including a capacitor for applying a low reset signal to said flip-flop means when the charge on said capacitor is below a predetermined value and a resistor connected across said capacitor for discharge of said capacitor therethrough, means for charging said capacitor during time coincidence of said timer signal and said second signal and at a greater rate than said capacitor can discharge through said resistor.
 8. Control apparatus comprising:.Iadd.A. .Iaddend.a housing, .Iadd.B. .Iaddend.a shaft mounted in said housing for rotation about the axis of said shaft, .Iadd.C. .Iaddend.a magnet mounted on said shaft for movement by said shaft through an orbital path relative to said housing, .Iadd.D. .Iaddend.magnetically actuated sensor means mounted on said housing adjacent said orbital path for generating a first signal when said magnet has been moved to a fixed point in its orbital path and a second signal when said magnet has been moved a predetermined distance from said fixed point, .Iadd.E. .Iaddend.timer means for producing a signal of predetermined time duration, .Iadd.F. .Iaddend.means for starting said timer means into operation in response to generation of said first signal, .Iadd.G. .Iaddend.means for effecting a control function in response to time coincidence of said second signal and said timer signal .Iadd.wherein said effecting means includes,i. a flip-flop means, ii. means for setting said flip-flop apparatus in response to said second signal being generated during the existence of said timer signal, iii. means for effecting said control function in response to the setting of said flip-flop apparatus.Iaddend.. .[.9. Control apparatus as set forth in claim 8 wherein said means for effecting a control function in response to time coincidence of said second signal and said timer signal comprises:a flip-flop means, means for setting said flip-flop means if said second signal is generated during the existence of said timer signal, means responsive to the setting of said flip-flop means for effecting said control function..].
 10. Apparatus as set forth in claim .[.9.]. .Iadd.7 .Iaddend.wherein said timer means includes a capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said capacitor for charging said capacitor through said variable resistor.
 11. Apparatus as set forth in claim .[.9.]. .Iadd.7 .Iaddend.wherein said timer means includes a first capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said first capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said first capacitor for charging said first capacitor through said variable resistor, said apparatus further including:a second capacitor, means including a manually operable switch for connecting said first and second capacitors in parallel when said switch is operated.
 12. Apparatus as set forth in claim .[.9.]. .Iadd.7 .Iaddend.and further including:a manually operable switch, means responsive to operation of said switch for resetting said flip-flop means.
 13. Apparatus as set forth in claim .[.9.]. .Iadd.7 .Iaddend.and further including:means including a capacitor for resetting said flip-flop means when the charge on said capacitor drops below a predetermined value, said means further including means for rapidly charging said capacitor to above said value during the existence of said timer signal and means for slowly discharging said capacitor when said timer signal is not present.
 14. Apparatus as set forth in claim .[.9.]. .Iadd.7 .Iaddend.and further including:means for delaying for a predetermined and substantial period of time following time coincidence of said second signal and said timer signal, the operation of said means for effecting said control function.
 15. Apparatus as set forth in claim .[.9.]. .Iadd.7 .Iaddend.wherein said flip-flop means is resettable by application of a low signal thereto and wherein said flip-flop means cannot be set while a low reset signal is applied thereto, and further including:means including a capacitor for applying a low reset signal to said flip-flop means when the charge on said capacitor is below a predetermined value and a resistor connected across said capacitor for discharge of said capacitor therethrough, means for charging said capacitor during time coincidence of said timer signal and said second signal and at a greater rate than said capacitor can discharge through said resistor.
 16. Apparatus of the character described, comprising:a housing, a shaft mounted in said housing for rotation about the axis of said shaft, a magnet mounted on said shaft for movement thereby through an orbital path relative to said housing, first and second magnetically actuated sensors mounted on said housing and disposed adjacent said orbital path, said sensors and magnet being dimensioned and said sensors being disposed relative to each other such that as said magnet is moved past said sensors said magnet will first actuate one of said sensors alone, then actuate both sensors simultaneously, then actuate the other of said sensors alone.
 17. Apparatus as set forth in claim .[.16.]. .Iadd.14 .Iaddend.and further including:a flip-flop means, means responsive to actuation of said first sensor for setting said flip-flop means when said first sensor is actuated, means responsive to actuation of said second sensor for resetting said flip-flop means when said second sensor is actuated, means for producing an inhibit signal during actuation of either sensor, means for producing a reverse-direction signal each time that said flip-flop means is set and said inhibit signal is not present, means for effecting a control function, means responsive to the production of a reverse-direction signal for actuating said control-function-effecting means.
 18. Apparatus as set forth in claim .[.17.]. .Iadd.15 .Iaddend.wherein said means responsive to the production of a reverse-direction signal is a latchable means, said apparatus further including:means for resetting said latchable means when said first flip-flop means is reset by actuation of said second sensor and said inhibit signal is not present.
 19. Apparatus as set forth in claim .[.17.]. .Iadd.15 .Iaddend.wherein said means responsive to the production of a reverse-direction signal includes means for counting said reverse-direction signals and for inhibiting operation of said control-function-effecting means until the count of said reverse-direction signals is greater than one.
 20. Apparatus as set forth in claim .[.16.]. .Iadd.14 .Iaddend.and further including:a first flip-flop means, means responsive to actuation of said first sensor for setting said first flip-flop means when said first sensor is actuated, means responsive to actuation of said second sensor for resetting said first flip-flop means when said second sensor is actuated, means for producing an inhibit signal during actuation of either sensor, means for producing a reverse-directon signal each time that said first flip-flop means is set and said inhibit signal is not present, a second flip-flop means, means responsive to the production of a reverse-direction signal for setting said second flip-flop means, means operable in response to setting of said second flip-flop means for effecting a control function.
 21. Apparatus as set forth in claim .[.20.]. .Iadd.18 .Iaddend.and further including:means for resetting said second flip-flop means when said first flip-flop means is reset and said inhibit signal is not present.
 22. Apparatus as set forth in claim .[.20.]. .Iadd.18 .Iaddend.wherein said means responsive to the production of a reverse-direction signal includes a counting means for counting said reverse-direction signals and for inhibiting setting of said second flip-flop means until the count of said reverse-direction signals is greater than one.
 23. Apparatus as set forth in claim .[.21.]. .Iadd.19 .Iaddend.and further including:means for resetting said second flip-flop means and said counting means when said first flip-flop means is reset and said inhibit signal is not present.
 24. Apparatus as set forth in claim .[.16.]. .Iadd.14 .Iaddend.and further including:timer means for producing a signal of predetermined time duration, means responsive to each movement of said magnet past said sensors for causing said timer means to produce its signal after said first sensor is deactuated, a flip-flop means, means responsive to the presence of said timer signal and actuation of said first sensor for setting said flip-flop means if said first sensor is actuated by said magnet during the existence of said timer signal, means responsive to the setting of said flip-flop means for effecting a control function.
 25. Apparatus as set forth in claim .[.24.]. .Iadd.22 .Iaddend.wherein said timer means includes a capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said capacitor for charging said capacitor through said variable resistor.
 26. Apparatus as set forth in claim .[.24.]. .Iadd.22 .Iaddend.wherein said timer means includes a first capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said first capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said first capacitor for charging said first capacitor through said variable resistor, said apparatus further including:a second capacitor, means including a manually operable switch for connecting said first and second capacitor in parallel when said switch is operated.
 27. Apparatus as set forth in claim .[.24.]. .Iadd.22 .Iaddend.and further including:a manually operable switch, means responsive to operation of said switch for resetting said flip-flop means.
 28. Apparatus as set forth in claim .[.24.]. .Iadd.22 .Iaddend.and further including:means including a capacitor for resetting said flip-flop means when the charge on said capacitor drops below a predetermined value, said means further including means for rapidly charging said capacitor to above said value during the existence of said timer signal and means for slowly discharging said capacitor when said timer signal is not present.
 29. Apparatus as set forth in claim .[.24.]. .Iadd.22 .Iaddend.and further including:means for delaying the operation of said control-function-effecting means for a predetermined and substantial period of time following time coincidence of said second signal and said timer signal.
 30. Apparatus as set forth in claim .[.24.]. .Iadd.22 .Iaddend.wherein said flip-flop means is resettable by application of a low signal thereto and wherein said flip-flop means cannot be set while a low reset signal is applied thereto, and further including:means including a capacitor for applying a low reset signal to said flip-flop means when the charge on said capacitor is below a predetermined value and a resistor connected across said capacitor for discharge of said capacitor therethrough, means for charging said capacitor during time coincidence of said timer signal and first season actuation at a greater rate than said capacitor can discharge through said resistor.
 31. Apparatus as set forth in claim .[.16.]. .Iadd.14 .Iaddend.and further including:a first flip-flop means, means responsive to actuation of said first sensor for setting said first flip-flop means when said first sensor is actuated, means responsive to actuation of said second sensor for resetting said first flip-flop means when said second sensor is actuated, means for producing an inhibit signal during actuation of either sensor, means for producing a reverse-direction signal each time that said first flip-flop means is set and said inhibit signal is not present, means responsive to the production of a reverse-direction signal for effecting a control function, timer means for producing a signal of predetermined time duration, means for starting said timer means into operation each time said first flip-flop means is reset and said inhibit signal is not present, a second flip-flop means, means for setting said second flip-flop means if said first sensor is actuated by said magnet during the existence of said timer signal, means responsive to the setting of said second flip-flop means for effecting a control function.
 32. Apparatus as set forth in claim .[.31.]. .Iadd.29 .Iaddend.wherein said timer means includes a capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said capacitor for charging said capacitor through said variable resistor.
 33. Apparatus as set forth in claim .[.31.]. .Iadd.29 .Iaddend.wherein said timer means includes a first capacitor for determining the duration of said timer signal in accordance with the length of time that it takes for said first capacitor to charge to a predetermined voltage level and means including a variable resistor connected in series with said first capacitor for charging said first capacitor through said variable resistor, said apparatus further including:a second capacitor, means including a manually operable switch for connecting said first and second capacitors in parallel when said switch is operated.
 34. An automatic impedance-changing circuit for connecting a load to a direct current voltage source, said circuit having an input connected to one side of said voltage source and an output connected to said load, said load being also connected to the other side of said voltage source for current flow from a voltage source through said circuit and said load, said current comprising:a first current path from the input of said circuit to the output thereof, said first current path having a resistor therein, a second current path from the input of said circuit to the output thereof, said second current path having a switch means therein for allowing current flow through said second current path when said switch means is closed and for preventing current flow through said second current path when said switch means is open, means connected between the input of said circuit and said other side of said voltage source for closing said switch means if the voltage at said input is below a predetermined magnitude.
 35. A circuit as set forth in claim .[.34.]. .Iadd.32 .Iaddend.wherein said second current path shorts across said resistor in said first current path when said switch means is closed.
 36. A circuit as set forth in claim .[.34.]. .Iadd.32 .Iaddend.wherein said second current path includes a resistor which is connected in parallel with the first current path resistor when said switch means is closed.
 37. A circuit as set forth in claim .[.36.]. .Iadd.34 .Iaddend.and further including:a third current path from the input of said circuit to the output thereof, said third current path having a switch means therein for allowing current flow through said third current path when said switch means is closed and for preventing current flow through said third current path when said switch means is open, means connected between the input of said circuit and said other side of said voltage source for closing said third current path switch means if the voltage at said input is below a predetermined magnitude which is less than the predetermined magnitude for closing said second current path switch means.
 38. A circuit as set forth in claim .[.37.]. .Iadd.35 .Iaddend.wherein said third current path shorts across said resistor in said first current path when said third current path switch means is closed.
 39. An automatic impedance-changing circuit for connecting a load to a direct current voltage source, said circuit having an input connected to one side of said voltage source and an output connected to said load, said load also being connected to the other side of said voltage source for current flow from a voltage source through said circuit and said load, said circuit comprising:a first current path from the input of said circuit to the output thereof, said first current path having a resistor therein, a second current path from the input of said circuit to the output thereof, said second current path having a transistor therein to allow or prevent current flow through said second current path if said transistor is on or off, respectively, means including a zener diode connected between the input of said circuit and said other side of said battery, said zener diode being conductive if the voltage at said input exceeds the breakdown potential of said zener diode, means responsive to conduction of said zener diode for turning said transistor off and responsive to non-conduction of said zener diode for turning said transistor on.
 40. A circuit as set forth in claim .[.39.]. .Iadd.37 .Iaddend.wherein said second current path shorts across said first current path resistor when said transistor is turned on.
 41. A circuit as set forth in claim .[.39.]. .Iadd.37 .Iaddend.wherein said second current path includes a resistor in series with said transistor. A circuit as set forth in claim .[.39.]. .Iadd.37 .Iaddend.and further including:a third current path from the input of said circuit to the output thereof, said third current path having a transistor therein to allow or prevent current flow through said third current path if said transistor is on or off, respectively, means including a second zener diode connected between the input of said cirucit and said other side of said battery, said second zener diode being conductive if the voltage at said input exceeds the breakdown potential of said second zener diode, said second zener diode having a breakdown potential lower than that of said first-mentioned zener diode, means responsive to conduction of said second zener diode for turning said third current path transistor off and responsive to non-conduction of said zener diode for turning said transistor on.
 43. A circuit as set forth in claim .[.42.]. .Iadd.40 .Iaddend.wherein said third current path shorts across said first current path resistor when said third current path transistor is turned on. 